PPC seemed dead when Apple switched to x86, but the new PPC technology we keep hearing about in development is encouraging.

No doubt Intel and AMD will have something similar in the pipeline around the time this PPC design is completed though.

The article is interesting reading, and evidently there's silicon for it, not just a simulation....so, it's at least possible the 'future' becomes basically a 'cluster on a chip' with many cores on a single die..

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Are we not done with the same silly arguments and flames yet??!

More:

http://www-03.ibm.com/press/us/en/pressrelease/19508.wss

More on powerpc future:
http://www-128.ibm.com/developerworks/library/pa-directions-powerorg/

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retired

Quote:

could be built into "compute-intensive applications, including mobile gaming, homeland security

Homeland security?! I guess that's the new growth sector in the US? Next time, they'll probably point out that the new CPU can target 1024 islamic terrorists at the same time ;)

8-bit?!? Yeah, I can see them being really useful for running Spectrum or C64 software...

Tell you what, I'll design a CPU with 100,000 1-bit "processors"

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Author of the PortablE programming language.
It is pitch black. You are likely to be eaten by a grue...

Useful for raytracing ... if there where some more than just 8 bits.

Quote:

Tell you what, I'll design a CPU with 100,000 1-bit "processors"

It's already been done.. they're called FPGA's!

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Men who have girlies in their avatars are Girliemen!

1 bit processors are called serial processors..

The Origional CRAY, had 32 Thousand.

Graphics only uses 8 bits, Per Colur channel, as only advanced physics uses nonlinear interactions, requiring red, green, blue interactions.. otherwise, basic 16 bit extended math can be used.. even for 32 bit audio, there are such things as double extended, or you can just clump banks of prosessors together.. FFT can be parraleled.. and almost all functions are linear on FFT equivalents.

Unlike Unicode, all HTML is essentially ASCII.. or 8 bit text, as is XML and such.

Tumber encryption is a secure core, that generates an 8 bit rolling number.

An 8 bit system can hanlde a 256 bit encryption key, at bit level. The simpler the system, the faster it can chew though simplified code.

1024 cores allows you to carry out simultaneous access and moification to each of 256 pixels, almost an entire line, each channel, per clock cycle.

RodTerl

Yes.. My Entire 8 bit AI design can now be moved to a single chip.. 8) This is Really going to pi$$ off Honda.
8)

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The older and more respected a scientist is, the longer it takes to prove him wrong.

Quote:

PPC seemed dead when Apple switched to x86, but the new PPC technology we keep hearing about in development is encouraging.

As far as personal computer shaped things, maybe. But for what Freescale and IBM actually care about for PowerPC, it's actually very very much alive. It mostly goes in things that you don't know it's in there. Apple was actually a small player in PowerPC, which is why they had difficulty getting the performance they demanded. Freescale and IBM had more important PowerPC things to do. Apple was only the most publicised PowerPC thing, especially as they were part of the definition of PowerPC in th beginning, even though they were a relatively small part of it in recent years.

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GOPS doesn't quite equate GFLOPS. It's like comparing DX8 GPU (integer shaders processors) with DX9 GPU (fp shaders processors). ATI X1900 Mobile has 48 32bit FP pixel shader processors which delivers ~375 GFlops. But for GOPS, NVIDIA's claims thier NV2A GPU (XBOX) delivers ~80 GOPS (theoretical). PS; Obtaining operation rating may differ.

Anyway...
Dual core@2Ghz/35Watts (with Turion 64 X2 silicon), yields ~12GOP (64bit, from it’s six ALU units) or 24 GOPs (32bit packed) or 96 GOPs (8bit packed). Current AMD64s decodes/translates their MMX/MMX+/SSE integers ISA to ALU units. Limitation comes from L2 cache (128bit width) and MCH bandwidth i.e. inability to effectively feed 3-way symmetric 64bit ALUs.

Dual core @800Mhz*(low power mode), yields ~4.8GOP (64bit, from it’s six ALU units) or 9.6 GOPs (32bit packed) or 38.4 GOPs (8bit packed).

PS; Not including “instructions-in-flight” i.e. factor in pipeline depth i.e. 12 stage for integer.

*90nm non-SOI Winchester core@800Mhz consumes around 3Watts. AMD/IBM 90nmSOI keeps single core TDP for dual core ie. Turion X2.

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@RodTerl
Northwood’s ALU units was design to be 16bit (to simplify the design for clock speed) but double pump’ed for 32bit handling. The front end cloaks the micro-architecture.

Last edited by Hammer on 13-Apr-2006 at 12:48 AM.

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Nintendo is again going with a PPC core in the new console (purportedly a 750 mhz "hollywood" PPC).

Micro$oft is already using them in the new xbox.

They exist in lots of embedded devices too (hopefully the ACK board soon as well).

PPC is alive and well. It's just left the desktop market.

Last edited by Legion on 13-Apr-2006 at 03:24 AM.

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...wait... what?

@Hammer
Quote:

Anyway... Dual core AT 2Ghz/ 35Watts (with Turion 64 X2 silicon).....

Dual core 2GHz using 35W is OK but not market leading.
PPC leads the market with power/performance (5W dual core 2GHz), follow link.
PWRficientTM
This is not simulation, but actual 65nm silicone, plus what is MORE impressive is all the extra I/O onboard and management cct's.

Cheers,
Tim

The desktop marked is slowly dying anyway,and will be replaced by HTPC,and simmilar technology. There is nothing wrong in IBM consentrate their effort,on the embedded marked. Desktop will once again,be a plattform for those with a special interrest in computer's,or to them who use a computer in a way,that a "livingroom unit" cannot do... This is what i belive anyway,but you're free to belive otherwise

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@T_Power
Invalid comparison since
1. AMD's 35 watt label is max power NOT "typical power".
2. Unlike PA Semi, Turion 64 X2 targets for May 2006 release i.e. already released as an engineering release to OEMs.

What I didn’t show is that Turion 64 X2 goes up to 2.2Ghz and there are 25Watt dual core "speed bin". They are not Q4 2006/Q1 2007 AMD 65nm parts i.e. DSL-SOI 90nm parts.

Refer to http://www.notebookreview.com/default.asp?newsID=2831
The link correlates with MSI’s (Micro-Star-International) laptop road map.

Quote:

This is not simulation, but actual 65nm silicone, plus what is MORE impressive is all the extra I/O onboard and management cct's.

To keep things into perspective, AMD already demo’ed their 65nm quad core Opteron(around time of IDF 2006). Within the AMD/IBM joint R&D process group, AMD was the first to demo a working 45nm SRAM (~3 month after Intel's 45nm SRAM demo).

Turion 64 X2 targets for May 2006 release i.e. already released as an engineering release to ODMs.

AMD is capable doing same as PA-Semi in regards to offering additional in-house I/O e.g. $100 (AMD Geode based) laptop (not including WiFi chipset). But in this case, AMD will not economically block its partners** (e.g. NVIDIA, ATI, SIS, VIA) like Intel Corp (with Centrino). **Refer to AMD's “virtual gorilla” initiative.

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@Hammer
Quote:

@T_Power Invalid comparison since 1. AMD's 35 watt label is max power NOT "typical power". 2. Unlike PA Semi, Turion 64 X2 targets for May 2006 release i.e. already released as an engineering release to OEMs. What I didn't show is that Turion 64 X2 goes up to 2.2Ghz and there are 25Watt dual core "speed bin". They are not Q4 2006/Q1 2007 AMD 65nm parts i.e. DSL-SOI 90nm parts. Refer to http://www.notebookreview.com/default.asp?newsID=2831 The link correlates with MSI's (Micro-Star-International) laptop road map.

Just KNEW that would get you "Googling" for a while.

According to that link, Turion 64 X2 AT 2.2GHz is 35W, not 25W.
As for release dates, a start-up with radical tech only has ONE first impression and better get it right FIRST TIME.
Remember Transmeta, Big hype but poor performance and bad delivery.
It appears PASemi is willing to spend the extra time on tweaking the design.

Complete server element on a blade at ONLY 25W WORST CASE, (not including memory. (See page 8.))

Here is a pa_semi_pwrficient_introduction.pdf you won't find on there "PWRficient White Papers" page.

Cheers,
Tim

Quote:

Just KNEW that would get you "Googling" for a while.

Google was not use for http://www.notebookreview.com

Quote:

According to that link, Turion 64 X2 AT 2.2GHz is 35W, not 25W.

25Watt was referring to 1.8Ghz 'speed bin' i.e. the purpose of the supplied link.

Quote:

Remember Transmeta, Big hype but poor performance and bad delivery.

What hype? There's nothing new with Transmeta i.e. the refer to micro-code patches for P6 generation X86 processors. Imagine a P6 processor without HW decoders but only with micro-code engine with a trace cache.

VLIW techniques existed since K7's Macro-Op (fusion of two RISCy instructions per instruction issue).

Last edited by Hammer on 15-Apr-2006 at 02:59 AM.

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Quote:

Complete server element on a blade at ONLY 25W WORST CASE, (not including memory. (See page 8.))

Blade != complete PC system e.g. needs RAID SATA controller.

Issues with PA-SEMI's white paper.

On "Page 4"
1. From AMD Yamato platform POV. NVIDIA supplies a single chip solution i.e. CPU (HTT) (HTT) MCP (includes NV SATA).
2. Factoring HTX slots (Direct hyper-transport co-processors e.g. Clearspeed).

Quote:

Similarly, the AMD-based architecture, shown on the right, has the problem of memory contention, since there is only a single shared-memory controller.,

(May 2006) Turion 64 X2 actually runs on Socket S1 i.e. dual channel DDR-II MCH.

With the currect AMD Socket 939/940, there are actually two MCHs for Opteron. A dual core Opteron equals two Socket 754 Athlon 64s (single core).

Last edited by Hammer on 15-Apr-2006 at 04:07 AM.
Last edited by Hammer on 15-Apr-2006 at 04:05 AM.

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